The most advanced machine ever built for making chips still cannot print the biggest AI chip designs in one shot, and that one gap is quietly setting the pace for how fast your AI tools get cheaper.
If you use AI agents but have never thought much about the factories behind them, this is the story worth knowing. Not because you need to understand optics, but because the constraint is unusually simple and unusually stubborn.
What the machine actually does
Think of chip manufacturing as extremely fancy printing. A machine shines patterned light onto a silicon wafer, transferring a circuit design onto it. ASML, a Dutch company, makes the machines that do this at the smallest scales, and its newest generation carries a price tag around $400 million each. Its previous generation, still the workhorse of the industry, runs roughly $200 million per system.
Here is where the paper size analogy earns its keep. Every printer has a maximum area it can expose in a single pass. So does this one. And the largest AI chip designs now exceed it.
The workaround costs real money
When a design is too big for one exposure, chipmakers split it and print in multiple steps, then align the pieces. That works. It also adds time, complexity, and cost to every single wafer, and any process with more steps has more chances to go wrong.
AI accelerators are making this worse rather than better, because the trend in AI silicon has been toward bigger. Larger chips mean more compute sitting closer together, which matters enormously for the kind of work AI models do. So the designs keep pushing against the size ceiling, and the multi-step workaround becomes the norm instead of the exception for the most demanding parts.
ASML has a fix planned. It is expected somewhere in the 2031 to 2033 window. That is not a typo, and it is not evasion on ASML’s part either. Building machines that manipulate light at these scales takes years of engineering, and the roadmap reflects that reality.
Meanwhile, you cannot just order more machines
The second half of this story is supply, and it is refreshingly unglamorous. ASML’s near-term output is capped by two things: physics, and clean-room space. There is a limit to how fast these systems can be built and tested, and a limit to how much specialized floor space exists to build them in.
Some numbers give the scale. Full-year 2026 plans call for roughly 65 Low NA EUV systems and about 130 DUV immersion systems, alongside a planned 30% capacity increase. ASML’s CFO Roger Dassen told Reuters that the company’s existing EUV machines are effectively sold out through 2027.
Sold out through 2027, from a company that makes the only tools capable of this work, with a size limitation that will not be properly addressed until the early 2030s. That is the shape of the problem.
Customers are buying in anyway
On 8 September 2026, ASML announced that Samsung Electronics and TSMC had both committed to using its High NA EUV systems in high-volume manufacturing. Intel has signaled confidence in the machines as well. These are the three companies that matter most in advanced chip production, and none of them are waiting for the perfect tool.
That tells you something useful. The limitation is real, but the machines are still the best option available by a wide margin. Chipmakers are choosing to absorb the extra steps and extra cost rather than sit out a generation.
What this means if you just use AI agents
You will never touch one of these machines. But the constraint reaches you anyway, in a few specific ways.
- Compute stays expensive longer. When the most capable chips require multi-step printing, they cost more to make. Those costs travel downstream into what providers charge for AI usage.
- Capacity arrives in steps, not smooth curves. Supply is gated by how many machines exist and where they can physically be installed. That is why compute availability sometimes feels like a queue rather than a market.
- Software efficiency matters more than it should. When hardware cannot scale as fast as demand, the pressure shifts to smaller models, better routing, and smarter agent design. A lot of recent progress in making agents cheaper to run is a response to exactly this kind of physical wall.
None of this is a crisis. Chipmakers have worked around exposure limits before, and the industry has a long record of turning inconvenient physics into engineering problems it eventually solves. But it is a useful corrective to the idea that AI progress is purely a software story.
Somewhere in the Netherlands, a machine the size of a bus is being assembled in a clean room, and the number of those rooms is finite. When someone tells you AI capability is limited only by imagination, remember that it is also limited by how big a rectangle of light can be.
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